The present invention relates to grain boundary barrier layer ceramic capacitors in which the surfaces of the individual grains of a ceramic semiconductor are insulated with a layer of nonconductive material which is diffused into the ceramic.
Grain boundary barrier layer ceramic capacitors (also referred to as internal or intergranular barrier layer ceramics) are well known in the art. The material systems for such capacitors are typically based on barium titanate (BaTiO.sub.3) or strontium titanate (SrTiO.sub.3). The base materials are doped with additions of various transition metals and rare earth elements to promote grain growth and enhance the semiconductivity in the base ceramic material. Additionally, these dopants improve various electrical properties of the capacitors utilizing these material systems. The sintered semiconductive ceramic body is subsequently treated by diffusing an insulating material into the ceramic body to provide continuous insulating boundaries around the semiconductive ceramic grains.
Grain boundary barrier layer ceramics based on barium titanate are disclosed in U.S. Pat. Nos. 3,473,958 and 3,569,802. Barium titanate is an attractive base material because of its high dielectric constant, however, it suffers from the disadvantage of having a Curie peak within the typical range of capacitor operating temperatures and, as a result, other electrical properties, such as resistivity, are poor or difficult to control.
Strontium titanate, though having a lower dielectric constant than barium titanate, has more recently been found to provide an excellent base material for grain boundary barrier layer ceramic capacitors. Strontium titanate exhibits a Curie peak outside the temperature range of interest and its systems can be used to provide capacitors which exhibit an improvement over barium titanate capacitors in such properties as dissipation factor, resistivity and breakdown voltage. Examples of material systems for strontium titanate grain boundary barrier layer capacitors are disclosed in U.S. Pat. No. 3,933,668 and published Japanese patent application No. 76-143900 (Application No. 75-68699, filed June 6, 1975).
Capacitors made from various modifications of the strontium titanate system disclosed in U.S. Pat. No. 3,933,668 exhibit a change in capacitance from the room temperature value, over the range of -30.degree. C. to +85.degree. C., as low as 15%. However, the actual maximum range of temperatures over which the industry typically measures changes in capacitance is -55.degree. C. to +125.degree. C. Over this range, the change in capacitance of the capacitors disclosed in the above identified patent would be approximately 24% (from -12% at -55.degree. C. to +12% at +125.degree. C.). This amount of change is unacceptable for many applications. The above identified published Japanese patent application No. 76-143900 discloses modified strontium titanate grain boundary barrier layer capacitors with an optimum capacitance change of +9% to -8% (17% total change) in the temperature range of -30.degree. C. to +80.degree. C. Again, however, over the maximum range of interest of -55.degree. C. to +125.degree. C., the change will likely be substantially greater than that disclosed. Good temperature stability is, therefore, not provided by either of the foregoing material systems.
It is also known to modify strontium titanate used in making grain boundary barrier layer capacitors by doping the ceramic material with lanthanide series rare earths. The lanthanum acts as a donor dopant to render the strontium titanate semiconductive. The previously mentioned Japanese patent application discloses such an addition in very small amounts ranging from 0.02 to 0.36 mole %. The upper limit on the lanthanum addition is identified as being critical, with amounts in excess of 0.36 mole % reported to adversely affect various properties of the capacitor. It is well known, however, that low concentrations of donor dopants in a composition are difficult to control and usually require the use of high purity raw materials. Otherwise, small concentrations of impurities in the raw or precursor materials may contaminate the dopant and substantially diminish or negate its intended effects.
As mentioned previously, it is desirable to insulate the grain boundaries of the doped sintered ceramics by a subsequent diffusion treatment at sub-sintering temperatures. Such a diffusion treatment is disclosed in U.S. Pat. No. 3,933,668, discussed above. However, the temperatures at which this insulating diffusion treatment is accomplished range from 1000.degree. to 1300.degree. C., thus preventing the application of silver or other low melting point electrode materials until after the diffusion treatment. This, of course, requires an additional process step.